发明名称 Coordinating idle state transitions in multi-core processors
摘要 Systems and methods of managing processors provide for detecting a command at a core of a processor having a plurality of cores, where the command requests a transition of the core to an idle state. Power consumption of the core is managed based on the command and an idle state status of each of the plurality of cores.
申请公布号 WO2006028652(A3) 申请公布日期 2006.07.06
申请号 WO2005US28699 申请日期 2005.08.12
申请人 INTEL CORPORATION;NAVEH, ALON;MENDELSON, AVI;ANATI, ITTAI;WEISSMAN, ELIEZER 发明人 NAVEH, ALON;MENDELSON, AVI;ANATI, ITTAI;WEISSMAN, ELIEZER
分类号 (IPC1-7):G06F1/32 主分类号 (IPC1-7):G06F1/32
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