发明名称 MULTILAYER WIRING BOARD AND ITS MANUFACTURING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To form simply a dig-out which an electronic part, such as a semiconductor chip, etc. is inserted, and an improvement in productivity is aimed at, and to enable it to carry the electronic part in the dig-out part good. <P>SOLUTION: Since the dig-out 27 which the semiconductor chip 26 inserts in the second substrate 21 is formed and this second substrate 21 is located on the first substrate 20, the hollowed-out 27 can be formed beforehand in the second substrate 21. For this sake, since the hollowed-out 27 can be formed in the second substrate 21 simply and corrected without using a special cutting unit, the productivity can be improved. Moreover, since a building-up part 28 is formed in the shape of a frame along with the peripheral side of a chip loading region E on the first substrate 20, an insulating adhesive layer 29 is formed in the first substrate 20 located in the peripheral side of this building-up part 28 and the first and second substrates 20 and 21 are joined, the entering of the insulating adhesive layer 29 into the hollowed-out 27 can be stopped by the building-up part 28 at the time of the bonding. Consequently, the semiconductor chip 26 can be carried in the hollowed-out 27 good. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006179733(A) 申请公布日期 2006.07.06
申请号 JP20040372520 申请日期 2004.12.24
申请人 CASIO COMPUT CO LTD 发明人 SONODA HIROYUKI
分类号 H05K3/46;H01L23/12 主分类号 H05K3/46
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