| 摘要 |
PROBLEM TO BE SOLVED: To provide an apparatus and method of designing a circuit which can design a circuit in which it can be determined that is not faulted if an inspection by a used test pattern is passed even if it does not raise a fault coverage. SOLUTION: A failure simulator 1 executes a failure simulation by a test pattern to an IC entered as IC circuit information, and outputs information on non-detected node and the number of toggles for every node to a circuit designing part 2. The circuit designing part 2 performs the arrangement and the interconnection line treatment of the circuit using the IC circuit information which defined the structure and the specification of the circuit, adds the non-detected node and doubling of via as opposed to the node below fixed numbers in the number of toggles, adds the treatment of interconnect line width of face scalability, etc., and forms layout data based on the information from the failure simulation part 1. COPYRIGHT: (C)2006,JPO&NCIPI
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