发明名称 |
VORRICHTUNG UND VERFAHREN ZUR DATENUMSETZUNG SOWIE ENTSPRECHENDER AUFZEICHNUNGSTRÄGER |
摘要 |
<p>A picture reducing circuit 1 reduces a supplied original picture. A higher picture memory 2 stores an input higher picture. A predictive tap extracting circuit 3 extracts predictive taps from the higher picture stored in the higher picture memory 2 and outputs the extracted predictive taps to a mapping circuit 4, predictive coefficient generating circuit 5, and pixel value updating circuit 8. The mapping circuit 4 calculates a linear combination of predictive taps and predictive coefficients and obtains a predictive picture. The predictive picture is output to an error calculating circuit 6. The error calculating circuit 6 calculates an error (S/N ratio) between pixel value of the predictive picture and that of the original picture. A comparing and determining circuit 7 controls a non-linear processing circuit 9 corresponding to the difference of the errors. The non-linear processing circuit 9 adds or subtracts a predetermined value to/from the pixel value of each pixel of the updated higher picture corresponding to the variation amount of pixel value updated by the pixel value updating circuit 8. <IMAGE></p> |
申请公布号 |
DE69931597(D1) |
申请公布日期 |
2006.07.06 |
申请号 |
DE1999631597 |
申请日期 |
1999.09.17 |
申请人 |
SONY CORP., TOKIO/TOKYO |
发明人 |
KONDO;TAKAHASHI;KOBAYASHI;WATANABE |
分类号 |
H04N19/50;G06T3/40;H04N1/41;H04N7/015;H04N7/12;H04N19/105;H04N19/132;H04N19/136;H04N19/137;H04N19/196;H04N19/423;H04N19/46;H04N19/59;H04N19/70;H04N19/85 |
主分类号 |
H04N19/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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