发明名称 METHOD FOR REDUCING NUMBER OF PINS IN CHIP PACKAGE, AND THE CHIP PACKAGE
摘要 PROBLEM TO BE SOLVED: To provide a method for reducing the number of pins in a package. SOLUTION: First, a plurality of common pins 1 to 16 of a chip and at least one of special pins 17 to 20 are arranged at the different regions. Secondly, when a chip package 200 and a wiring substrate are connected, the region of the special pins 17 to 20 is made to adjoin a non-soldered region of the wiring substrate, and the region of the common pins 1 to 16 is made to adjoin a soldered region of the wiring substrate. The special pins 17 to 20 are arranged at the bottom part of the chip package 200. When the chip package 200 and the wiring substrate are connected, the bottom part of the chip package 200 adjoins a solder resistance layer of the wiring substrate, and the common pins 1 to 16 adjoins the signal line of wiring circuit. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006177918(A) 申请公布日期 2006.07.06
申请号 JP20050005537 申请日期 2005.01.12
申请人 SILICON MOTION INC 发明人 CHYAN YU-WEI
分类号 G01R31/28 主分类号 G01R31/28
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