| 摘要 |
A method for manufacturing a high voltage transistor is disclosed. The method includes sequentially forming gate oxide films, polysilicon layers, and silicon nitride films on a semiconductor substrate; patterning the silicon nitride films, the polysilicon layers, and the gate oxide films using photolithographic and isotropic etching processes to form nitride film shades and polysilicon gate electrodes; implanting impurity ions into the substrate using the nitride film shades as protective barriers; performing an annealing process to form source and drain diffusion regions of a double diffusion structure; and removing the nitride film shades. Therefore, since the silicon nitride films are used as the protective barriers during impurity ion implantation, the source and drain diffusion regions can be formed in a double diffusion drain junction structure without forming a space oxide film. Also, the source and drain diffusion regions of the double diffusion drain junction structure can be stably formed by one pattern process and one ion implantation process.
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