发明名称 |
Start-stop synchronization serial communication circuit and semiconductor integrated circuit having start-stop synchronization serial communication circuit |
摘要 |
When detecting a start bit, a start bit detection circuit 15 a outputs a signal for starting the oscillating operation of a clock signal generation circuit 16. When latching an end code for indicating the end of serial communication, a latch circuit 21 outputs the end code to a decoder 26. The decoder 26 decodes the end code and outputs a signal for stopping the oscillating operation of the clock signal generation circuit 16. Thus, the power consumption of the clock signal generation circuit 16 can be reduced.
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申请公布号 |
US2006146970(A1) |
申请公布日期 |
2006.07.06 |
申请号 |
US20050544054 |
申请日期 |
2005.07.29 |
申请人 |
KATO ISAMI;MIYAGI HIROSHI |
发明人 |
KATO ISAMI;MIYAGI HIROSHI |
分类号 |
H04L25/38;G06F1/04;G06F1/32;H04L7/04;H04L25/40 |
主分类号 |
H04L25/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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