发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To reduce a variation of a threshold voltage of a miniaturized MISFET. <P>SOLUTION: The gate electrode 9a of an MISFET (Q<SB>1</SB>) is formed on the substrate 1 of an active region L, whose circumference is specified by an element isolation groove 2, and extending from one end to the other across the active region L. The gate electrode 9a is composed of an H-shaped plane pattern as a whole, whose gate length in the border region of the active region L and element isolation groove 2 is larger than that in the center section of the active region L. Further, the gate electrode 9a covers the whole one side along the direction of the gate length of the border region of the active region L and element isolation groove 2 and part of two sides along the direction of the gate width. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006179949(A) 申请公布日期 2006.07.06
申请号 JP20060037398 申请日期 2006.02.15
申请人 RENESAS TECHNOLOGY CORP 发明人 NISHIDA AKIO;YABUOSHI NORIYUKI;YOSHIDA YASUKO;KOMORI KAZUHIRO;TSUJI SOSUKE;MIWA HIDEO;HIGUCHI MITSUHIRO;IMATO KOICHI
分类号 H01L21/8234;H01L21/336;H01L21/8236;H01L21/8238;H01L21/8244;H01L27/08;H01L27/088;H01L27/092;H01L27/10;H01L27/11;H01L29/78 主分类号 H01L21/8234
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