发明名称 Method for forming shallow trench isolation in semiconductor device
摘要 A method for forming shallow trench isolation in a semiconductor device including forming a pad oxide, a pad nitride, and a pore-generating layer on an entire surface of a semiconductor substrate in successive order; etching the pore-generating layer, the pad nitride, the pad oxide and the substrate to form a trench in the substrate; forming a trench oxide over the entire surface of the substrate by a CVD process to fill the trench; and removing the trench oxide in an active device area while retaining the trench oxide in the trench.
申请公布号 US2006148202(A1) 申请公布日期 2006.07.06
申请号 US20050320686 申请日期 2005.12.30
申请人 DONGBUANAM SEMICONDUCTOR, INC. 发明人 JEONG HO S.
分类号 H01L21/76;C23C16/00 主分类号 H01L21/76
代理机构 代理人
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