SEMICONDUCTOR DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor device which isolates an n-well from n+buried layer to reduce chip size. SOLUTION: The semiconductor device comprises a plurality of low voltage n-well area 31 biased at different potentials and isolated from a substrate 1 by a common n+buried layer 11 and at least one high voltage n-well area 27. The low voltage n-well area 31 is coupled to the common subjacent n+buried layer 11 through a common p+buried layer 17. The n-well area 31 is applied to the substrate 1 usable in the semiconductor device, the n+buried layer 11 is formed in a designated low voltage area 5 of a negatively biased p-type semiconductor. COPYRIGHT: (C)2006,JPO&NCIPI