发明名称
摘要 Forming a transistor with self-aligned contacts on a substrate comprises: (a) forming a multilayer sequence of a gate oxide layer, a gate layer (104) and one or more protection layers; (b) etching the multilayer through an etching mask down to the gate oxide layer to form a multilayer column corresponding to a transistor active region; (c) forming spacers on the column sidewalls and implanting oxidation-promoting doping impurities into a silicon substrate (100) region not masked by the column and the sidewall spacers; (d) locally oxidising the silicon substrate in the implanted region and removing the sidewall spacers and protective layers to form a field oxide layer (122); (e) depositing an insulating layer (130) over the column and polishing the layer down to the column; (f) etching the column through a gate etching mask down to the gate oxide layer to form a gate structure and to expose the active region sidewalls; (g) forming self-aligned insulating sidewall spacers (142, 143) on the sidewalls of the gate structure and of the active region and implanting source and drain regions (150, 152) into the silicon substrate on opposite sides of the gate structure in the regions where the gate oxide is exposed by the column etching step; and (h) removing the exposed gate oxide and forming source and drain contacts (160, 162) which are self-aligned on the gate structure (140). The substrate (100) may be a solid silicon substrate or an SOI substrate.
申请公布号 JP3793626(B2) 申请公布日期 2006.07.05
申请号 JP19970225180 申请日期 1997.08.21
申请人 发明人
分类号 H01L21/336;H01L21/28;H01L21/302;H01L21/3065;H01L21/762;H01L21/768;H01L23/485;H01L29/78 主分类号 H01L21/336
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