发明名称 Fault tolera nt superconductive memory
摘要 1,098,450. Circuits employing superconductive elements. GENERAL ELECTRIC CO. Oct. 20, 1966 [Oct. 22, 1965], No. 47076/66 Heading H3B. [Also in Division G4] . Each drive line 41(i) of an addressable memory, e.g. a coincident current thin film memory 40, has an individual address selection circuit so that faulty selection circuits may be disabled without affecting the remaining part of the memory. To select a particular X- coordinate drive line, e.g. 41(3), an initial reset current is applied via switch 45 to the gate conductor of cryotrons connected in shunt paths 43(i), each shunt path 43(i) being connected in parallel with its associated drive line 41(i). The cryotrons are thus rendered resistive so that an input current Ix travels to earth via each of the drive lines. The line 41(3) is then selected by closing switches 44(2) and 44(3) so that current is applied to the gate conductors of cryotrons connected in drive lines 41(1), 41(2) and 41(4), as shown, the drive current Ix being then diverted away from these drive lines and through their corresponding shunt lines 43(1), 43(2) and 43(4). Thus only one particular X-coordinate drive line, i.e. 41(3), conducts current, and this line may cooperate with a similarly selected Y-coordinate drive line 410 at the cross-over point 412, to magnetically influence the thin film memory plate, whose state at the point 412 is sensed in conventional manner. Shunt path-drive line cross-overs, e.g. 413, 414 or shunt path-shunt path cross-overs, e.g. 415 are not sensed. To reduce space the lines at each set of four cross-over points, e.g. 412-415, may be formed in layers on the memory plane, while to reduce the number of lines traversing the memory a pair of drive lines may share the same shunt path (Fig. 5, not shown). In another embodiment (Fig. 7, not shown), a particular drive line is selected by inhibiting particular ones of cryotrons (77(i)) and only then allowing drive current to pass through the selected drive line, while in a further embodiment (Fig. 8, not shown), the shunt paths do not cross the memory plane and the drive lines are therefore formed as loops, the resulting effect being a reduction in the required number of cryotrons. Auxiliary memory address selection circuits (Fig. 9, not shown), are also described, any one of which is enabled to replace a faulty selection circuit which is then by-passed.
申请公布号 GB1098450(A) 申请公布日期 1968.01.10
申请号 GB19660047076 申请日期 1966.10.20
申请人 GENERAL ELECTRIC COMPANY 发明人
分类号 G11C15/06 主分类号 G11C15/06
代理机构 代理人
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