发明名称 Reconfiguration device for faulty memory
摘要 A device for reconfiguring faults in a circuit comprised of several units and comprising storage means for storing the fault locations, connection/disconnection means for disconnecting faulty units and connecting in their place fault-free units, and means for generating control signals of the connection/disconnection means, responding to the content of the storage means. According to this method, each unit is divided into several portions; in a test phase, fault tests are carried out for the different units, and the test results of the different portions of the units are stored in the storage means; and in a use phase aiming at the use of given unit portions, said control signals are determined by the content of the storage means corresponding to these unit portions.
申请公布号 US7073102(B2) 申请公布日期 2006.07.04
申请号 US20020286686 申请日期 2002.11.01
申请人 LROC TECHNOLOGIES 发明人 NICOLAIDIS MICHAEL
分类号 G11C29/00 主分类号 G11C29/00
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