发明名称 |
Method for packaging a microelectronic device using on-die bond pad expansion |
摘要 |
Expanded bond pads are formed over a passivation layer on a semiconductor wafer before the wafer is diced into individual circuit chips. After dicing, the individual chips are packaged by fixing each chip within a package core and building up one or more metallization layers on the resulting assembly. In at least one embodiment, a high melting temperature (lead free) alternative bump metallurgy (ABM) form of controlled collapse chip connect (C4) processing is used to form relatively wide conducting platforms over the bond pads on the wafer.
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申请公布号 |
US7071024(B2) |
申请公布日期 |
2006.07.04 |
申请号 |
US20010861689 |
申请日期 |
2001.05.21 |
申请人 |
INTEL CORPORATION |
发明人 |
TOWLE STEVEN;JONES MARTHA;VU QUAT T. |
分类号 |
H01L21/44;H01L23/52;H01L21/3205;H01L21/60;H01L23/12;H01L23/485 |
主分类号 |
H01L21/44 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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