发明名称 |
Word line compensation in non-volatile memory erase operations |
摘要 |
Compensation voltage(s) are applied to a non-volatile memory system during erase operations to equalize the erase behavior of memory cells. Compensation voltages can compensate for voltages capacitively coupled to memory cells of a NAND string from other memory cells and/or select gates. A compensation voltage can be applied to one or more memory cells to substantially normalize the erase behavior of the memory cells. A compensation voltage can be applied to end memory cells of a NAND string to equalize their erase behavior with interior memory cells of the NAND string. A compensation voltage can also be applied to interior memory cells to equalize their erase behavior with end memory cells. Additionally, a compensation voltage can be applied to one or more select gates of a NAND string to compensate for voltages coupled to one or more memory cells from the select gate(s). Various compensation voltages can be used.
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申请公布号 |
US2006140012(A1) |
申请公布日期 |
2006.06.29 |
申请号 |
US20040025620 |
申请日期 |
2004.12.29 |
申请人 |
WAN JUN;LUTZE JEFFREY W;PANG CHAN-SUI |
发明人 |
WAN JUN;LUTZE JEFFREY W.;PANG CHAN-SUI |
分类号 |
G11C16/04 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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