发明名称 EXECUTING CHECKER INSTRUCTIONS IN REDUNDANT MULTITHREADING ENVIRONMENTS
摘要 A method and apparatus for a checker instruction in a redundant multithreading environment is described. In one embodiment, when RMT requires, a processor may issue a checker instruction in both a leading thread and a trailing thread. The checker instruction may travel down individual pipelines for each thread independently until it reaches a buffer at the end of each pipeline. Then, prior to committing the checker instruction, the checker instruction looks for its counterpart and does a comparison of the instructions. If the checker instructions match, the checker instructions commit and retires otherwise an error is declared.
申请公布号 WO2006039595(A3) 申请公布日期 2006.06.29
申请号 WO2005US35375 申请日期 2005.09.29
申请人 INTEL CORPORATION;MUKHERJEE, SHUBHENDU;EMER, JOEL;REINHARDT, STEVEN;WEAVER, CHRISTOPHER 发明人 MUKHERJEE, SHUBHENDU;EMER, JOEL;REINHARDT, STEVEN;WEAVER, CHRISTOPHER
分类号 G06F11/00;G06F11/16 主分类号 G06F11/00
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