Memory cell matrix for integration of solid electrolyte memory cells has word line and plate line that are controlled by means of selection transistor and exhibits common plate electrode which is connected to common plate circuit

摘要

The memory cell matrix has the solid electrolyte memory cells which covers a layer pile (CC, R, PL), a word line (WL), a bit line (BL) and a plate line (PL) that are controlled by means of a selection transistor (T) and exhibits a common plate electrode (PL) which is connected to a common plate line. An independent claim is also included for: (a) manufacture of memory cell matrix; and (b) apparatus with a memory element.