发明名称 MULTILAYER WIRING SUBSTRATE
摘要 PROBLEM TO BE SOLVED: To improve the surface planarity of a multilayer wiring substrate, provided with a multilayer wiring layer formed, using a build-up method on the surface of a core substrate. SOLUTION: The multilayer wiring substrate is configured, in such a way that on the surface of the core substrate 1, where a wiring circuit layer 3 is covered and formed on an insulating substrate 2 containing an organic resin, the multilayer wiring substrate 15 is formed, by successively laminating an insulation layer 11 containing the organic resin and wiring circuit layer 13. By setting the surface roughness (Ra) of the wiring circuit layer 3 on the surface of the core substrate 1 as 100 nm to 1μm, and at the same time, forming the wiring circuit layer 3 with a dent of 0.1 to 10μm from the surface of the insulating substrate 2, the multilayer wiring substrate having superior surface planarity can be provided. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006173650(A) 申请公布日期 2006.06.29
申请号 JP20060040853 申请日期 2006.02.17
申请人 KYOCERA CORP 发明人 HAYASHI KATSURA
分类号 H05K3/46;H05K3/10 主分类号 H05K3/46
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