发明名称 TESTING CIRCUIT FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To verify the validity of an input pattern, and to detect faults in a test circuit itself, in the test circuit for inputting a serial test pattern. SOLUTION: The test circuit of a semiconductor integrated circuit device comprises a scan flip-flop circuit 10 for connecting a plurality of stages of flip-flops in series and supplies a serial test pattern inputted from the outside to a circuit to be tested; and a validity determining section 40 that is connected to the final stage of the scan flip-flop circuit in series and checks the validity of the inputted serial test pattern. The validity determining section includes a first check value setting circuit 20a for outputting the check result of validity in the serial input direction of the serial test pattern; and a second check value installation circuit 20b for outputting the check value of validity, in the direction of the time of the serial test pattern. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006170963(A) 申请公布日期 2006.06.29
申请号 JP20040367936 申请日期 2004.12.20
申请人 FUJITSU LTD 发明人 MASUDA SATOSHI
分类号 G01R31/28;H01L21/822;H01L27/04 主分类号 G01R31/28
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