发明名称 Z-state circuit for phase-locked loops
摘要 The four types of the Z-state circuits basically include a sensing gate, two stacked PMOS transistors, and a feedback line. The sensing gate senses a voltage at its input assuming no feedback is applied. Again, the corresponding output of two stacked PMOS transistors is assumed to be connected to the sensing input. Two stacked PMOS transistors generate a high impedance Z-state at its output according to the corresponding gate voltages. Therefore, the feedback line keeps sampling the output and feeding back the output voltage to the sensing input. Consequently, the feedback configuration provides the initial loop condition, which is affected by the midpoint voltage decided by the device aspect ratios of the sensing gate before normal operation starts.
申请公布号 US2006139072(A1) 申请公布日期 2006.06.29
申请号 US20040023683 申请日期 2004.12.27
申请人 PARK SANGBEOM 发明人 PARK SANGBEOM
分类号 H03L7/06 主分类号 H03L7/06
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