发明名称 Method of fabricating semiconductor device
摘要 A gate is formed on a predetermined area of a substrate. A spacer insulating layer is formed on sidewalls of the gate. An insulating interlayer is formed over the substrate including the gate and the spacer insulating layer. Polymer generation is simultaneously carried out on a lateral side of the spacer while carrying out a dry etching process on the insulating interlayer. A sidewall spacer is left on both of the sidewalls of the polysilicon gate by performing wet etching to the insulating interlayer and the spacer insulating layer.
申请公布号 US2006141719(A1) 申请公布日期 2006.06.29
申请号 US20050312504 申请日期 2005.12.21
申请人 JUNG MYUNG J 发明人 JUNG MYUNG J.
分类号 H01L21/336;H01L21/311 主分类号 H01L21/336
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