发明名称 PROGRAMMABLE LOGIC CIRCUIT
摘要 <p>A programmable logic circuit that uses encrypted configuration data to ensure the concealment of design information without using any dedicated decrypting circuits. In this programmable logic circuit, an encrypted configuration bit stream is loaded into the register (not shown) of the configuration circuit (2) formed in each of PEs (4) arranged in an array, while passing through a configuration chain (6). At this moment, the input configuration bit stream exhibits changes in its value, while passing through the configuration chain (6). It is, therefore, nobody but the designer that knows what value the configuration bit stream exhibits when it reaches a target one of the PEs (4) arranged in the array. Thus, if a feedback circuit (40a) is provided between two configuration circuits (2) at respective desired positions to feed back the data, then the data can be stirred, so that it is hard for a third party to estimate the configuration data.</p>
申请公布号 WO2006068109(A1) 申请公布日期 2006.06.29
申请号 WO2005JP23315 申请日期 2005.12.20
申请人 JP 发明人 MOTOZUKA, HIROYUKI
分类号 H03K19/173;G09C1/00;H03K19/177;H04L9/10 主分类号 H03K19/173
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