| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor storage device especially useful for miniaturizing DRAM. <P>SOLUTION: A write command is input from the outside, the voltages of bit lines BLT and BLB are constituted of VDL and VSS, voltages are written in the storage node SN of a capacitor via a memory cell transistor according to the threshold values (LVT: low threshold voltage, MVT: middle threshold voltage, and HVT: high threshold voltage) of the memory cell transistor. Then, a plate line PL connected to the plate side of the capacitor is driven from a voltage VPL to a voltage VPH. When the voltage of the storage node SN is increased by coupling, the bit line BLT is reduced from the voltage VDL to the voltage VDP, the voltages excessively written in the storage SN are reduced according to the sizes of the threshold voltages of the memory cell transistor, and a variance in voltages of the storage node SN caused by the variance of the threshold voltages is reduced. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
