| 摘要 |
A nonvolatile ferroelectric memory device features a multi-bit serial cell structure where read bit lines and write bit lines are divided to control read/write paths individually, thereby improving a transmission operation of serial data. In the nonvolatile ferroelectric memory device, a serial cell that comprises a plurality of switching devices and a plurality of ferroelectric capacitors is connected serially between a write switching device and a read switching device. The serial cell stores cell data applied from the write bit line sequentially in the plurality of ferroelectric capacitors at a write mode, and outputs the cell data stored in a plurality of ferroelectric capacitors to the read bit line at a read mode.
|
