| 摘要 |
A testing apparatus for testing an electronic device, comprising a plurality of test modules for transmitting/receiving signals to/from the electronic device; a plurality of feedback circuits each associated with a respective one of the plurality of test modules for receiving a fail timing signal indicative of a timing when a fail occurs in an output pattern outputted by the electronic device; a plurality of collecting parts for receiving the fail timing signals from the plurality of feedback circuits, calculating a logical sum of one or more of the fail timing signals, and for outputting a single-bit signal; and a plurality of distributing parts associated with the respective collecting parts for distributing the calculation results of the respective collecting parts to the plurality of test modules.
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