| 摘要 |
The invention relates to a method of manufacturing a semiconductor device ( 10 ) with a substrate ( 1 ) and a semiconductor body ( 2 ) comprising a first (N-MOS)PET ( 3 ) with a first channel region ( 3 A) and a first gate electrode ( 3 B) which includes a first conductor and which is separated from the channel region by a dielectric layer ( 4 ), and comprising a second (P-MOS)FET ( 5 ) with a second channel region ( 5 A) and a second gate electrode ( 5 B) which includes a second conductor that is different from the first conductor and which is separated from the channel region ( 5 A) by a dielectric layer ( 4 ), wherein to form the gate electrodes ( 3 B, 5 B) a first conductor layer ( 33 ) is deposited on the semiconductor body ( 2 ) provided with the dielectric layer ( 4 ), which layer ( 33 ) is subsequently removed outside the first channel region ( 3 A) after which a second conductor layer ( 55 ) is deposited on the semiconductor body ( 2 ), and wherein before the first conductor layer ( 33 ) is deposited, an intermediate layer ( 6 ) is deposited on the dielectric layer ( 4 ). According to the invention, a material for the intermediate layer ( 6 ) is chosen which is selectively etchable with respect to the dielectric layer ( 4 ), and before the deposition of the first conductor layer ( 33 ) the intermediate layer ( 6 ) is removed at the location of the firs channel region ( 3 A), and after the deposition of the first conductor layer ( 33 ) and the removal thereof outside the first channel region ( 3 A) and before the deposition of the second conductor layer ( 55 ), the intermediate layer ( 6 ) is removed at the location of the second channel region ( 5 A). Thus, FETs are obtained in a simple manner and without damage to their gate dielectric. Preferably, a further intermediate layer ( 8 ) is deposited on the intermediate layer ( 6 ) which is selectively etchable with respect thereto.
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