发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To reduce costs for a test by shortening time for testing a semiconductor memory having an error correction function and a data compression test function. SOLUTION: In a first data compression test mode for invalidating the error correction function, first test data TWD1 is written in a first regular memory block MB1. Second test data TWD2 is written not only in a second regular memory block MB2 but also in a parity memory block PMB. By changing the number of bits (data compression rate) for distributing the first and second test data TWD 1 and 2, a data compression test to the parity memory block PMB can be carried out without increasing the number of test terminals. As a result of this, the time for the test is shortened to reduce the costs for the test. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006172649(A) 申请公布日期 2006.06.29
申请号 JP20040366027 申请日期 2004.12.17
申请人 FUJITSU LTD 发明人 KIKUTAKE AKIRA;MATSUMIYA MASATO;ONISHI YASUHIRO
分类号 G11C29/34;G11C11/401;G11C11/403;G11C29/42 主分类号 G11C29/34
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