发明名称 Supercharge message exchanger
摘要 A system with a first random access memory (RAM), a second RAM, a first processor coupled to the first RAM and a second processor coupled to the second RAM. The first RAM is configured to store input/output (I/O) completions from at least two engines. The second RAM is also configured to store I/O completions from at least two engines. When all engines are active, the system writes I/O completions from the engines to the first and second RAMs. The first processor processes I/O completions stored in the first RAM. The second processor processes I/O completions stored in the second RAM.
申请公布号 US2006143341(A1) 申请公布日期 2006.06.29
申请号 US20060361344 申请日期 2006.02.24
申请人 EMULEX DESIGN & MANUFACTURING CORPORATION 发明人 LIU MICHAEL;ROACH BRADLEY;SU SAM;FIACCO PETER
分类号 G06F13/12;G06F13/38;G06F13/14;G06F13/28 主分类号 G06F13/12
代理机构 代理人
主权项
地址