| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method capable of solving the problem of mask misalignment even when a pitch between adjacent trench gates is set narrow, preventing an interlayer insulating film on the top of a trench from getting thinner, and preventing a dielectric breakdown strength from deteriorating across a gate electrode and a source electrode. SOLUTION: The method of manufacturing the semiconductor device equipped with, at least, an element active part containing a trench gate MOS semiconductor structure and a withstand voltage structure surrounding the element active part comprises processes of subjecting a polysilicon film inside a trench to etching, until the polysilicon film is set below the surface of the substrate after the polysilicon film is deposited on the polysilicon substrate; forming a source region between the trenches on the surface of the silicon substrate; laminating a silicon insulating film, a silicon nitride film, and a silicon oxide insulating film as interlayer insulating films in this sequence; performing chemical mechanical polish until the silicon nitride film appears; and subjecting the silicon nitride film to etching using the silicon oxide insulating film located at the upper part of the trench opening as a mask. COPYRIGHT: (C)2006,JPO&NCIPI
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