| 摘要 |
A system and method for interface translation between a system packet interface level 3 (SPI-3) defines an interface between a physical device (PHY device) and a link layer device, and a gigabit media independence interface (GMII) which defines an interface between a media access control (MAC) portion of a gigabit Ethernet and a physical device. The system includes a translation circuit for translating a GMII reception signal, received from a GMII interface device, into an SPI-3 reception signal synchronized with an SPI3 reference clock, and for translating an SPI-3 transmission signal, received from an SPI-3 interface device, into a GMII transmission signal synchronized with a GMII reference clock.
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