发明名称 Carry-ripple adder has 4 sum inputs for receiving 4 input bits, 3 carry inputs for receiving 3 input carry bits, sum output for outputting output summation bit of value w, 3 carry outputs for outputting 3 output carry bits
摘要 <p>The carry-ripple adder (1) has four sum inputs (2-5) for receiving four input bits to be summed of value w, three carry inputs (6-8) for receiving three input carry bits (C0IN, C1IN, C2IN) of value w, a sum output for outputting an output summation bit of value w and three carry outputs (10-12) for outputting three output carry bits of value 2w. An independent claim is also included for an adder for summing a number of. bit sets.</p>
申请公布号 DE102005011666(B3) 申请公布日期 2006.06.29
申请号 DE20051011666 申请日期 2005.03.14
申请人 INFINEON TECHNOLOGIES AG 发明人 HATSCH, JOEL;KAMP, WINFRIED
分类号 G06F7/42;G06F7/503 主分类号 G06F7/42
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