| 摘要 |
An all-pass state-variable Filter processes an input program signal into low, middle and high, frequency band signals. The middle frequency band signal has an additional inversion stage with respect to the low frequency and high frequency band signals. A first, second and third SDC (Scaled Detector Circuits) each have an input coupled to receive a respective frequency band signal and function to buffer, rectify and filter its respective frequency band signal to form a control voltage at its output. A first, second and third VCA (Voltage Control Amplifier) receives respective frequency band signals. Each VCA has a control voltage input. Each VCA reduces its gain in response to an increase in the control voltage applied to its control voltage input from an SDC output.
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