发明名称 Flash memory with low tunnel barrier interpoly insulators
摘要 Structures and methods for Flash memory with low tunnel barrier intergate insulators are provided. The non-volatile memory includes a first source/drain region and a second source/drain region separated by a channel region in a substrate. A floating gate opposing the channel region and is separated therefrom by a gate oxide. A control gate opposes the floating gate. The control gate is separated from the floating gate by a low tunnel barrier intergate insulator. The low tunnel barrier intergate insulator includes a metal oxide insulator selected from the group consisting of PbO, Al<SUB>2</SUB>O<SUB>3</SUB>, Ta<SUB>2</SUB>O<SUB>5</SUB>, TiO<SUB>2</SUB>, ZrO<SUB>2</SUB>, and Nb<SUB>2</SUB>O<SUB>5</SUB>. The floating gate includes a polysilicon floating gate having a metal layer formed thereon in contact with the low tunnel barrier intergate insulator. And, the control gate includes a polysilicon control gate having a metal layer formed thereon in contact with the low tunnel barrier intergate insulator.
申请公布号 US7068544(B2) 申请公布日期 2006.06.27
申请号 US20010945507 申请日期 2001.08.30
申请人 发明人
分类号 G11C16/04;H01L21/8247;H01L27/115;H01L29/423;H01L29/51;H01L29/788 主分类号 G11C16/04
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