| 摘要 |
FIELD: pulse digital equipment engineering, possible use for performing full synchronization function of input one-digit or two-digit direct or inverse input asynchronous digital signal(generation of one-digit synchronized signal or its synchrosignal), by means of input continuous series of clock pulses; possible utilization for engineering any synchronous machines with memory for inputting asynchronous commands or data in binary serial self-synchronizing code; in particular, possible utilization as decoder of three-level RZ code with return to zero, or as generator of synchronized serial code signal or its synchrosignal for any two-level binary serial self-synchronizing code, for example, Manchester code, Miller code, and the like. ^ SUBSTANCE: device contains three triggers, NOT element, clock input, first signal input and two outputs, and also additionally contains fourth trigger, OR element, two XOR elements, second and third signal codes and input of logical one signal, while first output of device is output of synchrosignal and is connected to output of first trigger and clock input of second trigger, output of which is output of synchronized signal and second output of device. ^ EFFECT: complex expansion of functional capabilities of device due to generation at outputs of device of synchronized signal and its synchrosignal for direct or inverse one-digit or two-digit input asynchronous digital signal by appropriate connection of device by means of three signal inputs. ^ 1 dwg |
