发明名称 Closed-loop, supply-adjusted RAM memory circuit
摘要 The supply voltage of a memory system is adjusted in response to changes in the frequency of the clock signal. The memory system measures a time from when data becomes valid on the output of a memory to the next clock edge to determine a timing value. When the clock frequency changes from a first frequency to a second frequency, the timing value changes from a first value to a second value. The magnitude of the supply voltage is changed to return the timing value to the first value.
申请公布号 US7069461(B1) 申请公布日期 2006.06.27
申请号 US20030351056 申请日期 2003.01.24
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 CHAN WAI CHEONG;DOYLE JAMES THOMAS;POPLEVINE PAVEL;VARADARAJULA MURALI KRISHNA;LIU HSING-CHIEN ROY;MORTENSEN GORDON
分类号 G06F1/04 主分类号 G06F1/04
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