发明名称 |
Methods for reducing wordline sheet resistance |
摘要 |
The present invention is directed to forming memory wordlines having a relatively lower sheet resistance. In one embodiment, a first poly-Si portion is deposited on a semiconductor substrate using a first precursor gas flow rate. A second poly-Si portion is deposited using a second precursor gas flow rate, where the second precursor flow rate higher than the first precursor gas flow rate. A tungsten silicide layer is deposited using silane gas. Wordlines are formed in trenches from poly-Si and WSix. A gate electrode is implanted.
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申请公布号 |
US2006134863(A1) |
申请公布日期 |
2006.06.22 |
申请号 |
US20040015154 |
申请日期 |
2004.12.17 |
申请人 |
LIU HUNG-WEI;SHIH HSUEH-HAO;WANG SZU-YU |
发明人 |
LIU HUNG-WEI;SHIH HSUEH-HAO;WANG SZU-YU |
分类号 |
H01L21/336;H01L21/44 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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