发明名称 DELAY STABILIZING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a delay stabilizing circuit capable of suppressing the lowering of the stability of a delay or a frequency and a cost increase and also reducing a design time, and to provide a semiconductor integrated circuit. SOLUTION: The delay stabilizing circuit includes: a passive noise filter 13 comprising a capacitor and a resistor; a ring oscillator 11 including a variable delay circuit 111 with a logic gate to which the power of a power supply is supplied via the noise filter 13; and a feedback control circuit 12 that uses a clock received externally for a reference and outputs a delay control signal DCTL for suppressing delay variations in the variable delay circuit 111 to the variable delay circuit 111, and the ring oscillator 11 outputs the clock CLK. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006165696(A) 申请公布日期 2006.06.22
申请号 JP20040350377 申请日期 2004.12.02
申请人 SONY CORP 发明人 KUMADA ICHIRO
分类号 H03K5/135;H03K3/03;H03L7/081 主分类号 H03K5/135
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