| 摘要 |
It is proposed that bitline inversion coding data be integrally stored in the structure of a column multiplexer of a storage device. For this purpose, connections to a predefined potential are selectively provided at connection points, which are respectively assigned to one of the bitlines connected to the column multiplexer, in dependence on whether or not the assignment of a first state and of a second state of memory cells, connected to the bitline, to a binary value "0" and to a binary value "1" is inverted for the respective bitline. The connection points are connected to a common nodal point via switching means. The switching means are activated through control signals of the column multiplexer. Selection signals for activating inverter means, in order to effect a selective inversion of values read out from the memory cells, are generated in dependence on the signal level at the common nodal point. A precharging of the common nodal point is preferably effected between to read-out operations in each case, for which purpose precharging switching means are provided.
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