A track-and-hold peak detector circuit, which can operate at low input signal frequencies, includes a capacitor to hold a peak voltage of the input signal and logic circuitry that reduces an effect of leakage current into or out of the capacitor, and therefore, provides protection against self-switching of an output signal of the peak detector circuit.
申请公布号
WO2006065317(A2)
申请公布日期
2006.06.22
申请号
WO2005US34815
申请日期
2005.09.26
申请人
ALLEGRO MICROSYSTEMS, INC.;ROMERO, HERNAN, D.;TOWNE, JAY, M.;EAGEN, JEFF;SCHELLER, KARL
发明人
ROMERO, HERNAN, D.;TOWNE, JAY, M.;EAGEN, JEFF;SCHELLER, KARL