MOS TRANSISTOR CIRCUIT USING DOUBLE INSULATED GATE FIELD EFFECT TRANSISTOR AND CMOS TRANSISTOR CIRCUIT USING THE SAME, SRAM CELL CIRCUIT, CMOS-SRAM CELL CIRCUIT, AND INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a MOS transistor circuit using a double insulated gate field effect transistor and a CMOS transistor circuit using the same, an SRAM cell circuit, a CMOS-SRAM cell circuit, and an integrated circuit that simultaneously satisfy both of high speed operation of a unit circuit and reduced power consumption thereof when not in use, in a stationary state, or in standby mode. SOLUTION: The MOS transistor circuit comprises a four-terminal double insulated gate field effect transistor. One gate of the four-terminal double insulated gate field effect transistor is configured as an input terminal, one end of a resistor is connected to the other gate, a source is connected to a first power source, a drain is configured as an output terminal and is connected to a second power source through a negative element, and the other end of the resistor is connected to a third power source of constant potential. COPYRIGHT: (C)2006,JPO&NCIPI