| 摘要 |
PROBLEM TO BE SOLVED: To efficiently implement debugging in a system LSI composed of a plurality of CPUs while reducing debug circuits. SOLUTION: The debug device comprises: a debug target selection means 109 for selecting a CPU to be debugged from CPUs 11-12 according to a request for selecting a debug target from a host PC 15 connected to the system LSI 17; an event information output means 110 for outputting internal event information of the selected CPU to be debugged; a detection event storage means 106 for temporally storing a detection event set by the host PC 15; and an event comparison means 105 that compares the internal event information outputted from the event information outputting means 110 and the detection event stored in the detection event storage means 106, and detects their coincidence. The event comparison means 105 notifies the host PC 15 of the detection of the event coincidence. COPYRIGHT: (C)2006,JPO&NCIPI
|
