发明名称 METHOD AND APPARATUS FOR ADDRESS TRANSLATION
摘要 <p>A memory management unit (MMU) (38, 40) has a cache for storing address translation entries (ATEs) corresponding to virtual addresses. If an ATE is present for a requested virtual address, then it is translated to the physical address and sent to main memory (18). If the MMU cache misses, the virtual address is hashed to obtain the physical address for a group of ATEs. After hashing, a decision is made whether to prefetch the group of ATEs or not. If so, the group is loaded into the data cache (16). Another determination is made; in this case whether to continue or not. If the request is not valid, the process is terminated. If the request is still valid, then a tablewalk (46) is performed on the group to find the matching entry, which is loaded into the MMU cache. The virtual address is translated to obtain the physical address which is sent to main memory (18).</p>
申请公布号 WO2006065416(A2) 申请公布日期 2006.06.22
申请号 WO2005US41149 申请日期 2005.11.10
申请人 FREESCALE SEMICONDUCTOR, INC.;GRAYSON, BRIAN C. 发明人 GRAYSON, BRIAN C.
分类号 G06F12/10 主分类号 G06F12/10
代理机构 代理人
主权项
地址