发明名称 ON-CHIP BUS SYSTEM
摘要 PROBLEM TO BE SOLVED: To solve the following problem of an on-chip bus system that, because a master device is made to wait the issue of next transaction regardless of a situation of a bus or a slave device when a FIFO is filled by continuous access because FIFO size storing the decoding result of an address is comparatively small, the throughput of the whole system is reduced. SOLUTION: In this on-chip bus system, by separating contents into the decoding result and a cumulative frequency when storing the decoding result of the address required when connecting the master device and the slave device into the FIFO in a writing data channel of the split bus, only a continuous frequency is stored to one decoding result when the same decoding results continue. Thereby, the use efficiency of the FIFO is improved. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006164024(A) 申请公布日期 2006.06.22
申请号 JP20040356753 申请日期 2004.12.09
申请人 CANON INC 发明人 OSHIMA KOJI
分类号 G06F13/362 主分类号 G06F13/362
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