发明名称 METHOD AND APPARATUS FOR VARIABLE SIGMA-DELTA MODULATION
摘要 <p>A method [100] for modulating a digital input signal [102] is disclosed. The digital input signal [102] is partitioned into a less-significant bit signal [108] and a more-significant bit signal [106]. A lower-order modulation of the less-significant bit signal [108] is performed to generate an intermediate output signal [112]. The intermediate output signal [112] is appended to the more-significant bit signal [106] to form an intermediate input signal [116]. A higher-order modulation of the intermediate input signal [116] is performed to generate a digital output signal [120]. The higher-order modulation is of an order higher than the lower-order modulation. A phase locked loop [400] using the method [300] and apparatus [100] is disclosed.</p>
申请公布号 WO2006065482(A2) 申请公布日期 2006.06.22
申请号 WO2005US42517 申请日期 2005.11.22
申请人 AGILENT TECHNOLOGIES, INC. 发明人 KO, HERBERT, L.
分类号 H04B14/06 主分类号 H04B14/06
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