发明名称
摘要 A multimedia processor for performing three dimensional graphics processing in an integrated circuit comprises a microprocessor circuit which is configured to generate triangle set-up information corresponding to a plurality of triangles that define a three-dimensional object displayed on a screen. The screen is defined by a plurality of bins having a predetermined number of pixels. A data cache is coupled to the microprocessor and configured to store the set-up information. A three-dimensional triangle rasterizer is coupled to the data cache and configured to perform bin allocation to the triangles so as to identify all bins that intersect with a triangle on the screen.
申请公布号 JP3786913(B2) 申请公布日期 2006.06.21
申请号 JP20020351620 申请日期 2002.12.03
申请人 发明人
分类号 G06F12/08;G06T1/20;G06T11/40;G06T15/00;G06T15/50;G06T15/80 主分类号 G06F12/08
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