发明名称 Apparatus and method for saving precise system state following exceptions
摘要 A computer system has at least one processor, a memory system, a Joint Test Action Group (JTAG) bus interface, and Input/Ouput devices. At least one Input/Ouput device of the system has an integrated circuit connected to and readable by the JTAG bus interface. The memory system of the computer system contains an exception handler capable of reading a state of the readable integrated circuit of the Input/Output device upon occurrence of an exception.
申请公布号 US7065691(B2) 申请公布日期 2006.06.20
申请号 US20030440890 申请日期 2003.05.19
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 ERICKSON MICHAEL JOHN;MANTEY PAUL JOHN
分类号 G01R31/28;G06F11/267 主分类号 G01R31/28
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