摘要 |
In order to generate a clock signal (f<SUB>T1</SUB>) that is coupled to a reference signal (FBAS), especially to an analog video signal, a free-running clock pulse (f<SUB>T1</SUB>) is generated from a high-frequency clock pulse (f<SUB>0</SUB>) and the reference signal (FBAS) is digitized therewith. In addition, a second clock pulse (f<SUB>T1</SUB>) is generated from the high-frequency clock pulse (f<SUB>0</SUB>) and the phase deviation between the first clock pulse (f<SUB>T2</SUB>) and the second clock pulse (f<SUB>T1</SUB>) is determined. The digitized sampling values of the reference signal (FBAS) at the first clock frequency (f<SUB>T1</SUB>) are converted, according to the phase deviation determined, into corresponding digitized sampling values having the second clock frequency (f<SUB>T1</SUB>) and are used as a target specification for generating the second clock pulse (f<SUB>T1</SUB>) thus coupled to the reference signal.
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