发明名称 |
Multi-layer overlay measurement and correction technique for IC manufacturing |
摘要 |
A system facilitating measurement and correction of overlay between multiple layers of a wafer is disclosed. The system comprises an overlay target that represents overlay between three or more layers of a wafer and a measurement component that determines overlay error existent in the overlay target, thereby determining overlay error between the three or more layers of the wafer. A control component can be provided to correct overlay error between adjacent and non-adjacent layers, wherein the correction is based at least in part on measurements obtained by the measurement component.
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申请公布号 |
US7065737(B2) |
申请公布日期 |
2006.06.20 |
申请号 |
US20040790296 |
申请日期 |
2004.03.01 |
申请人 |
ADVANCED MICRO DEVICES, INC |
发明人 |
PHAN KHOI A.;RANGARAJAN BHARATH;SINGH BHANWAR |
分类号 |
G06F17/50;G01N21/956;G03C5/00;G03F7/20;G03F9/00;H01L21/66;H01L23/544 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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