| 摘要 |
FIELD: digital computer engineering for usage in processors of computers and digital automatics devices. ^ SUBSTANCE: counter contains, in each bit, RS-trigger 8, seven logical elements AND 1-7, three elements OR 9-11, four elements NOT 12-16 and eight control buses 17,18,21-25,27. Device performs operations of counting impulses for addition, counting impulses for subtraction, parallel para-phase code receipt, inversion, left shift, right shift, logical addition and logical multiplication. Impulse counting operation is performed during two clock cycles. On basis of first cycle (pause) potential of through transfer is formed. Counting impulse forms result and inputs it into triggers 8. Particular property of counter is generation of transfer potential prior to arrival of counting impulse and artificial control over transfer in the moment of switching of RS-trigger 8 due to injection of counting impulse into transfer generation circuit during its switching to "zero" and due to forbidden transfer generation during its switching to "one". ^ EFFECT: increased speed of operation and expanded range of performed operations. ^ 1 dwg |
