发明名称 Memory managing method used in adding memory and information processing apparatus
摘要 An information processing apparatus for allowing a memory to be added thereto while being powered. The apparatus comprises a processor, a first main memory initially connected, and a connecting switch. The switch connects the processor, the first main memory, and a second main memory to be added. Main memory management information in the first main memory includes the size of memory resources connected to the processor. A storage region in the connecting switch retains information about whether or not the processor is connected to each of the memories. The setup allows the apparatus to use the added memory without having to be restarted.
申请公布号 US7062627(B2) 申请公布日期 2006.06.13
申请号 US20030642644 申请日期 2003.08.19
申请人 HITACHI, LTD. 发明人 MURAYAMA HIDEKI;HORIKAWA KAZUO;YASHIRO HIROSHI;YAMAUCHI MASAHIKO;ISHII YASUHIRO;SASAKI DAISUKE
分类号 G06F12/00;G06F12/02;G06F12/06;G06F12/08;G06F12/10 主分类号 G06F12/00
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